TPS82130SILR Supplementary Information

1. Packaging & Ordering Specifications

1.1 Core Packaging Attributes

• Package Type: µSiP (SIL) 8-pin package (SIL0008D)
• Nominal Body Size: 3.00 mm × 2.80 mm, maximum height 1.53 mm
• Exposed Thermal Pad: Mandatory soldering to GND for thermal dissipation and mechanical reliability; must connect to PCB ground planes via vias
• Status: Active (Production)
• RoHS Compliance: Yes
• Lead Finish/Ball Material: NIAU
• MSL Rating/Peak Reflow: Level-2-260°C-1 YEAR
• Operating Temperature Range: -40°C to 125°C
• Part Marking: H6 (additional markings for logo/lot trace code/environmental category may apply)

1.2 Ordering & Packaging Quantity

• Package Quantity (SPQ): 3000 units per carrier
• Carrier Type: LARGE Tape & Reel (T&R)
• Variant: TPS82130SILR.A (identical specs, active production status)

2. Tape & Reel Mechanical Dimensions (All nominal, unit: mm)

2.1 Reel Specifications

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2.2 Carrier Tape Specifications

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2.3 Tape & Reel Box Dimensions

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3. PCB Layout & Assembly Guidelines

3.1 Land Pattern Requirements

• Solder mask defined (SMD) land pattern with 0.05 mm minimum clearance on all sides
• Exposed thermal pad land pattern with 0.2 mm typical vias for thermal conduction
• Metal under solder mask with 0.05 mm typical radius (R)
• Recommended pick-and-place nozzle size: ≤1.3 mm

3.2 Stencil Design Specifications

• Stencil Thickness: 0.125 mm (base specification)
• Solder Paste Coverage: 85% of the exposed thermal pad area (by area)
• Aperture Design: Laser-cut apertures with trapezoidal walls and rounded corners (for optimal paste release; comply with IPC-7525 recommendations)
• Pin Aperture Sizes: 8×0.5 mm and 8×0.4 mm (symmetric layout), 6×0.65 mm symmetric for thermal pad vias

3.3 Critical Assembly Notes

1. All linear dimensions follow ASME Y14.5M dimensioning and tolerancing standards; parenthetical dimensions are for reference only.
2. Package drawing is subject to change without prior notice.
3. Thermal pad soldering is mandatory for both thermal performance and mechanical reliability (refer to TI literature SLUA271 for details).
4. Comply with ESD handling precautions (device is susceptible to ESD damage, ranging from performance degradation to complete failure).

4. Thermal Design Supplementary Requirements

• Thermal Resistance (JEDEC 51-5): RθJA = 58.2°C/W (junction-to-ambient); RθJA can be improved with custom PCB design (thermal vias for the thermal pad)
• Derating Requirement: Output current must be derated at high ambient temperatures (>65°C localized PCB temp) or high power dissipation; module temperature must not exceed 125°C (max rating)
• Thermal Enhancement Methods:

5. Disclaimer & Revision Notes

5.1 Information Disclaimer

• All packaging/mechanical data is TI’s knowledge as of the release date (6-Feb-2026 for Packaging Addendum, 6-Jun-2025 for Package Materials) and is subject to change without notice.
• TI does not conduct destructive testing/chemical analysis on incoming materials; CAS numbers and proprietary information may not be released.
• TI’s liability is limited to the total annual purchase price of the product(s) in question.

5.2 Document Revision

• The parent datasheet (TPS82130 SLVSCY5F) was revised in January 2023 (Revision F), with updates including Mandarin datasheet hyperlink, trademark information, and added Documentation Support section.
• Packaging and materials information last updated: October 2025.