DESCRIPTION

· The LMK61E2 is an ultra-low jitter PLLatinum™ programmable oscillator with a fractional-N frequency synthesizer and integrated VCO, designed to generate commonly used reference clocks. · Outputs can be configured as LVPECL, LVDS, or HCSL. · Features self start-up from on-chip EEPROM, factory programmed for 156.25-MHz LVPECL output. · Device registers and EEPROM settings are fully programmable in-system via I2C serial interface. · Operates from a single 3.3-V ±5% supply.

FEATURES

· Ultra-Low Noise, High Performance with Jitter: 90fs RMS Typical for fOUT > 100MHz. · PSRR: –70dBc, ensuring robust supply noise immunity. · Flexible Output Format; User Selectable: LVPECL up to 1GHz, LVDS up to 900MHz, HCSL up to 400MHz. · Total Frequency Tolerance of ±50ppm. · System Level Features: Frequency Margining (Fine and Coarse), Internal EEPROM for User Configurable Default Settings. · Device Control via I2C, 3.3-V Operating Voltage, Industrial Temperature Range (–40ºC to +85ºC), 7-mm ×5-mm 8-Pin Package.

APPLICATIONS

· High-Performance Replacement for Crystal-, SAW-, or Silicon-Based Oscillators. · Suitable for Switches, Routers, Network Line Cards, Base Band Units (BBU), Servers, Storage/SAN. · Applications in Test and Measurement, Medical Imaging, FPGA, and Processor Attach.