DESCRIPTION

· The LMK61E2 is an ultra-low jitter PLLatinum™ programmable oscillator with a fractional-N frequency synthesizer and integrated VCO for generating reference clocks.
· Outputs can be configured as LVPECL, LVDS, or HCSL.
· Features self start-up from on-chip EEPROM, factory programmed for 156.25-MHz LVPECL output.
· Device registers and EEPROM settings are programmable via I2C serial interface.
· Internal power conditioning provides excellent PSRR, reducing power delivery network complexity.
· Operates from a single 3.3-V ±5% supply.
· Supports fine and coarse frequency margining via I2C for system design verification tests.

FEATURES

· Ultra-Low Noise, High Performance: Jitter of 90fs RMS typical for fOUT >100MHz; PSRR of -70dBc.
· Flexible Output Formats: LVPECL up to 1GHz, LVDS up to 900MHz, HCSL up to 400MHz.
· Total Frequency Tolerance: ±50ppm.
· System Level Features: Frequency margining (fine and coarse), internal EEPROM for user configurable defaults.
· Other Features: Device control via I2C, 3.3-V operating voltage, industrial temperature range (-40ºC to +85ºC), 7-mm × 5-mm 8-pin package.
· Custom Design: Create custom designs using the LMK61E2 with WEBENCH® Power Designer.

APPLICATIONS

· High-Performance Replacement: For crystal-, SAW-, or silicon-based oscillators.
· Networking: Switches, routers, network line cards, base band units (BBU), servers, storage/SAN.
· Test and Measurement.
· Medical Imaging.
· FPGA and Processor Attach.