DESCRIPTION

· The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and SSTL-18 specifications for DDR-SDRAM and DDR2 memory termination.

· It supports DDR3 and DDR3L VTT bus termination with a minimum VDDQ of 1.35 V.

· The device includes a high-speed operational amplifier for excellent response to load transients.

· It features a VSENSE pin for superior load regulation and a VREF output for chipset and DIMM reference.

· The LP2998 incorporates an active low shutdown (SD) pin for Suspend to RAM (STR) functionality, providing a high-impedance output when activated.

FEATURES

· AEC-Q100 Test Guidance compliant.

· Junction Temperature Range: -40°C to 125°C.

· Minimum VDDQ of 1.35 V.

· Capable of sourcing and sinking current.

· Low output voltage offset.

· No external resistors required.

· Linear topology.

· Low external component count.

· Thermal shutdown protection.

APPLICATIONS

· DDR1, DDR2, DDR3, and DDR3L Termination Voltage.

· Automotive infotainment systems.

· FPGA device integration.

· Industrial and medical PCs.

· SSTL-18, SSTL-2, and SSTL-3 Termination.

· HSTL Termination.