SY88232LMG
2.5 Gbps Laser-Diode Driver with Integrated Limiting Post-Amplifier
32-Pin 5 mm × 5 mm QFN, –40 °C to +85 °C, Pb-Free NiPdAu Finish

1. Ordering & Package Details• Micrel (Microchip) orderable part numbers– SY88232LMG (tube, 96 pcs)– SY88232LMGTR (tape-and-reel, 2 500 pcs)• Package type: 32-pin QFN (5 mm × 5 mm × 0.85 mm max)• Lead pitch: 0.50 mm, exposed-pad (e-pad) down• Lead finish: NiPdAu, Pb-free, RoHS-compliant• MSL-3, 260 °C peak-reflow per JEDEC J-STD-020• Thermal resistance: θJA = 60 °C/W (still air, 4-layer JEDEC board)• Device top marking: “SY88232L” + Pb-free bar-line + date-code
2. Functional Overview• Single 3.3 V supply (3.0 V – 3.6 V)• Integrated laser driver + limiting post-amplifier for burst-mode PON• Data rate: 155 Mbps – 2.5 Gbps (NRZ)• Laser driver outputs– Modulation current (IMOD): 10 mA – 85 mA AC-coupled, 70 mA DC-coupled– Bias current (IBIAS): 1 mA – 70 mA, source-only– Compliance voltage: ≥ 2.4 V (MOD±, BIAS) for high-current DC-coupled lasers• On-chip digital APC loop (closed or open loop) with fault flag• Post-amplifier– Differential input sensitivity: 5 mVPP min, 1.8 VPP max– 50 Ω internal termination (SY88232LMG) – may be removed (SY88232ALMG)– CML outputs 50 Ω to VCC, 700 mVPP – 950 mVPP swing– Programmable LOS/SD (loss-of-signal / signal-detect) open-collector output– RSSI current output (5 µA/mVPP gain) for received-power monitoring• Total jitter: ≤ 30 pSPP (PRBS 2⁷-1, all rates)
3. DC Electrical Characteristics (3.3 V, 25 °C, unless noted)• ICC (driver active, no IBIAS/IMOD): 90 mA typ, 150 mA max• TTL control inputs: VIL ≤ 0.8 V, VIH ≥ 2.0 V, 75 kΩ pull-up typical• BIAS ON current accuracy: ±5 % (set via RBIASMAX)• Modulation current accuracy: ±5 % (set via RMODSET)• APC fault output: VOL ≤ 0.5 V @ 2 mA, IOH ≤ 100 µA leakage• CML outputs: VOH = VCC – 5 mV typ, VOL = VCC – 400 mV typ, ZOUT = 50 Ω ±15 %
4. AC Timing & Performance• Tr / Tf (MOD±, 20 %–80 %, 60 mA): 60 ps typ, 85 ps max• APC loop init time: 12 µs max (power-up), 2.5 ns (TXDIS toggle)• LOS assert / release: 2 µs – 10 µs (set by coupling cap)• Deterministic jitter: 15 pSPP (K28.5, 2.5 Gbps, 10 mVPP in)• Random jitter: 5 pSRMS (K28.7, 2.5 Gbps, 10 mVPP in)• Post-amp bandwidth: 2.0 GHz min, gain 38 dB (diff), 32 dB (SE)
5. Pin Summary (QFN-32)Laser-driver side6 DIN+ Diff data in (+), 50 Ω term7 DIN– Diff data in (–), 50 Ω term9 /TXDIS Fast disable (complement)10 TXDIS Fast disable (true)11 /TXEN Active-low driver enable (22 kΩ pull-up)12 APCSET Bias-current set (resistor to GND or current source)13 MODSET Mod-current set (resistor to GND or current source)14 BIASMAX Max-bias clamp (resistor to GND)15 MODMON IMOD/100 current monitor18 MOD– Modulation current (–)19 MOD+ Modulation current (+)21 BIAS Bias current to laser cathode22 MD Monitor photodiode input (anode)23 BIASMON IBIAS/50 current monitorPost-amplifier side27 RIN+ Diff data in (+), 50 Ω term (LMG only)28 RIN– Diff data in (–), 50 Ω term (LMG only)30 ROUT– CML data out (–), 50 Ω to VCC31 ROUT+ CML data out (+), 50 Ω to VCC24 RSSI Received-signal-strength current (1/1000 of peak)3 LOS/SD LOS (high) or SD (low) open-collector output2 LOSLVL Resistor to VCC sets threshold (VCC – 1.3 V → VCC)1 LOS/SD_SEL TTL select (high = LOS, low = SD)4 JAM Active-low squelch (75 kΩ pull-up)Power & misc5,8,16,24,29 GND Ground (thermal pad = GND)17,20,32 VCC 3.3 V supply (bypass 0.1 µF // 0.01 µF each pin)
6. Typical Application Hints• DC-couple laser: connect MOD+ to cathode, MOD– to anode, add 10 Ω – 20 Ω series damping; bias feeds cathode through 10 Ω – 22 Ω.• AC-couple: place 0.1 µF 0402 caps in series with MOD±; terminate MOD± to VCC with 50 Ω // (1 µH + 50 Ω) for return-to-zero.• Photodiode: MD pin to anode, cathode to VCC; use 100 pF – 1 nF feedback cap for APC stability.• LOS coupling cap: 0.001 µF – 1 µF (data-rate & CIDs dependent); keep RC < 1 µs for 2.5 G burst-mode.• CML outputs: AC-couple to external CDR/FPGA with 0.1 µF; trace length ≤ 25 mm, 50 Ω single-ended.• Thermal pad: solder to ground plane with 5 × 5 via array for θJA = 60 °C/W.
7. Package Outline & Land Pattern• Body: 5.00 mm ± 0.05 mm sq, 0.85 mm max height• Terminal width: 0.20 mm – 0.30 mm, length 0.40 mm typ• Exposed pad: 3.10 mm ± 0.10 mm sq, 0.05 mm – 0.20 mm standoff• Recommended solder stencil: 0.125 mm thick, 1 : 1 aperture on pad, 0.075 mm oversize on exposed pad• Pin-1 indicator: laser dot + chamfer corner on top; bottom dot on carrier tape
8. ESD & Latch-up• Human-body model: 2 kV (all pins)• Machine-model: 200 V• Latch-up: ±100 mA, 85 °C (JEDEC JESD78)
9. Documentation & Support• Datasheet: Micrel DS9999-063009-A (June 2009)• Evaluation board: SY88232L-EVB (Gerber & schematic available)• Application note: AN-2009-05 “Burst-Mode Laser Driver Design with SY88232L”• IBIS model: SY88232L.ibs (on Microchip web)
10. Legal & Handling• Not qualified for life-support or implantable devices.• Moisture sensitivity: MSL-3, bake 24 h @ 125 °C if exceeded floor-life (168 h).• RoHS-compliant, Pb-free reflow profile per JEDEC J-STD-020C peak 260 °C.