AMD XC95144XL-7TQG100I

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  • Part Number:

    XC95144XL-7TQG100I

  • Manufacturer:

    AMD

  • Category:

    Thermal Management

  • RoHs:

    rohs RoHS Compliant

  • Datasheet:

  • Description:

    IC CPLD 144MC 7.5NS 100TQFP

  • In stock 6,354
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Specifications
Type
Paramete
Type
Paramete
Programmable Type
In System Programmable (min 10K program/erase cycles)
Grade
-
Number of I/O
81
Operating Temperature
-40°C ~ 85°C (TA)
Number of Macrocells
144
Voltage Supply - Internal
3V ~ 3.6V
Qualification
-
Delay Time tpd(1) Max
7.5 ns
Number of Logic Elements/Blocks
8
Supplier Device Package
100-TQFP (14x14)
Mounting Type
Surface Mount
Number of Gates
3200
Package / Case
100-LQFP
Overview

XC95144XL-7TQG100I Model Information

Overview

The XC95144XL-7TQG100I is a high-performance CPLD (Complex Programmable Logic Device) from Xilinx, designed for high-speed, low-voltage applications in advanced communications and computing systems. This model features a 7.5 ns pin-to-pin delay, optimized for 3.3V systems, and is available in a Pb-free 100-pin Thin Quad Flat Pack (TQFP) package.

Key Features

  • High-Speed Performance: 7.5 ns pin-to-pin delay.
  • System Frequency: Up to 178 MHz.
  • Macrocells: 144 macrocells with 3,200 usable gates.
  • Package Options: 100-pin TQFP (81 user I/O pins).
  • Low Power Operation: 5V tolerant I/O pins, 3.3V or 2.5V output capability.
  • Advanced Technology: 0.35 micron CMOS Fast FLASH™ technology.
  • System Features: In-system programmable, superior pin-locking, and routability with Fast CONNECT™ II switch matrix.
  • Enhanced Security: Enhanced data security features.
  • Quality and Reliability: Exceeds 10,000 program/erase cycles, 20-year data retention, and ESD protection exceeding 2,000V.

Product Specification

  • Function Blocks: 54V18 Function Blocks.
  • Propagation Delays: 5 ns.
  • Power Estimation:ICC(mA) = MCHS(0.175PTHS + 0.345) + MCLP(0.052PTLP + 0.272) + 0.04 * MCTOG(MCHS + MCLP)* fWhere:MCHS = Macrocells in high-speed configuration.PTHS = Average number of high-speed product terms per macrocell.MCLP = Macrocells in low power configuration.PTLP = Average number of low power product terms per macrocell.f = Maximum clock frequency.MCTOG = Average % of flip-flops toggling per clock (~12%).

Absolute Maximum Ratings

  • Supply Voltage (VCC): -0.5 to 4.0 V.
  • Input Voltage (VIN): -0.5 to 5.5 V.
  • 3-State Output Voltage (VTS): -0.5 to 5.5 V.
  • Storage Temperature (TSTG): -65 to +150 °C.
  • Junction Temperature (TJ): +150 °C.

Recommended Operating Conditions

  • Supply Voltage for Internal Logic (VCCINT): 3.0 to 3.6 V (Commercial: 0°C to 70°C, Industrial: -40°C to +85°C).
  • Supply Voltage for Output Drivers (VCCIO): 3.0 to 3.6 V (3.3V operation), 2.3 to 2.7 V (2.5V operation).
  • Low-Level Input Voltage (VIL): 0 to 0.80 V.
  • High-Level Input Voltage (VIH): 2.0 to 5.5 V.
  • Output Voltage (VO): 0 to VCCIO.

Quality and Reliability Characteristics

  • Data Retention (TDR): 20 years.
  • Program/Erase Cycles (NPE): 10,000 cycles.
  • Electrostatic Discharge (ESD): 2,000 volts.

DC Characteristics

  • Output High Voltage (VOH): 2.4 V (3.3V outputs, IOH = -4.0 mA), 90% VCCIO (2.5V outputs, IOH = -500 μA).
  • Output Low Voltage (VOL): 0.4 V (3.3V outputs, IOL = 8.0 mA), 0.4 V (2.5V outputs, IOL = 500 μA).
  • Input Leakage Current (IIL): ±10 μA (VCC = Max; VIN = GND or VCC).
  • I/O High-Z Leakage Current (IIH): ±10 μA (VCC = Max; VIN = GND or VCC).

AC Characteristics

  • I/O to Output Valid (TPD): 7.5 ns.
  • I/O Setup Time Before GCK (TSU): 4.8 ns.
  • I/O Hold Time After GCK (TH): 0 ns.
  • GCK to Output Valid (TCO): 4.5 ns.
  • Multiple FB Internal Operating Frequency (fSYSTEM): 125 MHz.

Pin Configuration

  • Package Type: 100-pin TQFP.
  • Operating Range: Industrial (-40°C to +85°C).
  • Pb-Free: Yes.

Ordering Information

  • Model Number: XC95144XL-7TQG100I.
  • Speed Grade: 7.5 ns.
  • Package Type: 100-pin Thin Quad Flat Pack (TQFP); Pb-free.
  • Operating Range: Industrial (-40°C to +85°C).
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