DESCRIPTION

· The 74AHC594-Q100 and 74AHCT594-Q100 are high-speed Si-gate CMOS devices compatible with LSTTL.

· They are 8-bit, non-inverting, serial-in, parallel-out shift registers with an 8-bit D-type storage register.

· Separate clocks (SHCP and STCP) and direct overriding clears (SHR and STR) are provided for both shift and storage registers.

· A serial output (Q7S) is available for cascading.

· Both shift and storage register clocks are positive-edge triggered.

· Qualified to AEC-Q100 (Grade 1) for automotive applications.

FEATURES

· Automotive qualification per AEC-Q100 (Grade 1).

· Operating temperature range: -40°C to +125°C.

· Supply voltage range: 2.0 V to 5.5 V.

· Balanced propagation delays and high noise immunity.

· CMOS low power dissipation and overvoltage tolerant inputs up to 5.5 V.

· Independent clocks and direct overriding clears for shift and storage registers.

· Latch-up performance exceeds 100 mA per JESD 78 Class II Level A.

· Input levels: CMOS for 74AHC594-Q100, TTL for 74AHCT594-Q100.

· ESD protection: HBM exceeds 2000 V, CDM exceeds 1000 V.

· Multiple package options, including DHVQFN with Side-Wettable Flanks for AOI.

APPLICATIONS

· Serial-to-parallel data conversion.

· Remote control holding register.