Features

• Floating channel designed for bootstrap operation
• Fully operational to +500V or +600V
• Tolerant to negative transient voltage, dV/dt immune
• Gate drive supply range from 10 to 20V
• Undervoltage lockout for both channels
• 3.3V logic compatible
• Separate logic supply range from 3.3V to 20V, logic and power ground ±5V offset
• CMOS Schmitt-triggered inputs with pull-down
• Cycle by cycle edge-triggered shutdown logic
• Matched propagation delay for both channels
• Outputs in phase with inputs

Product Summary

• VOFFSET (IR2110): 500V max.
• VOFFSET (IR2113): 600V max.
• IO+/2A / 2A: Output current capabilities
• VOUT: 10 - 20V
• ton/off (typ.): 120 & 94 ns
• Delay Matching (IR2110): 10 ns max.
• Delay Matching (IR2113): 20 ns max.

Absolute Maximum Ratings

• VB: High side floating supply voltage (IR2110) -0.3 to 525, (IR2113) -0.3 to 625
• VS: High side floating supply offset voltage VB - 25 to VB + 0.3
• VHO: High side floating output voltage VS - 0.3 to VB + 0.3
• VCC: Low side fixed supply voltage -0.3 to 25
• VLO: Low side output voltage -0.3 to VCC + 0.3
• VDD: Logic supply voltage -0.3 to VSS + 25
• VSS: Logic supply offset voltage VCC - 25 to VCC + 0.3
• VIN: Logic input voltage (HIN, LIN & SD) VSS - 0.3 to VDD + 0.3
• dVs/dt: Allowable offset supply voltage transient — 50 V/ns
• PD: Package power dissipation @ TA ≤ +25°C (14 lead DIP) — 1.6, (16 lead SOIC) — 1.25
• RTHJA: Thermal resistance, junction to ambient (14 lead DIP) — 75, (16 lead SOIC) — 100
• TJ: Junction temperature — 150
• TS: Storage temperature -55 to 150
• TL: Lead temperature (soldering, 10 seconds) — 300