Features:

• Quad 3-State Buffer with Low Enable
• High-Performance Silicon-Gate CMOS Technology
• Outputs capable of sourcing and sinking current
• 'ACT125 variant has TTL Compatible Inputs
• Pb-Free Devices

Pinout:

• 14-Lead Packages (Top View)
• Pin Assignment:

Function Table:

• Inputs: An, Bn
• Output: On
• Logic Levels:

Marking Diagrams:

• XXXXXXX: Specific Device Code
• A: Assembly Location
• WL or L: Wafer Lot
• Y: Year
• WW or W: Work Week
• G or : Pb-Free Package

Maximum Ratings:

• VCC: DC Supply Voltage -0.5 to +6.5 V
• VI: DC Input Voltage -0.5 to +VCC + 0.5 V
• VO: DC Output Voltage -0.5 to +VCC + 0.5 V
• IIK: DC Input Diode Current -20 mA
• IOK: DC Output Diode Current -50 mA
• IO: DC Output Sink/Source Current -50 mA
• ICC: DC Supply Current per Output Pin -50 mA
• IGND: DC Ground Current per Output Pin -50 mA
• TSTG: Storage Temperature Range -65 to +150 °C
• TL: Lead temperature, 1 mm from Case for 10 Seconds 260 °C
• TJ: Junction temperature under Bias +150 °C

Recommended Operating Conditions:

• VCC: Supply Voltage 2.0 to 6.0 V
• Vin, Vout: DC Input Voltage, Output Voltage (Ref. to GND) 0 to -VCC V
• tr, tf: Input Rise and Fall Time (Note 1) - 150 to -40 ns/V at VCC @ 3.0 V

DC Characteristics:

• VIH: Minimum High Level Input Voltage
• VIL: Maximum Low Level Input Voltage
• VOH: Minimum High Level Output Voltage
• VOL: Minimum Low Level Output Voltage
• IIN: Maximum Input Leakage Current
• IOZ: VI (OE) = VIL, VIH
• IOLD: †Minimum Dynamic Output Current
• IOHD: 5.5 - - -75 mA VOLD = 1.65 V Max

AC Characteristics:

• tPLH: Propagation Delay Data to Output
• tPHL: Propagation Delay Data to Output
• tPZH: Output Enable Time
• tPZL: Output Enable Time
• tPHZ: Output Disable Time
• tPLZ: Output Disable Time

Capacitance:

• CIN: Input Capacitance 4.5 pF at VCC = 5.0 V
• CPD: Power Dissipation Capacitance 45 pF at VCC = 5.0 V

Package Dimensions:

• SOIC-14 (Pb-Free)
• TSSOP-14 (Pb-Free)